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Treaty on Intellectual Property in respect of Integrated Circuits (Washington, 26 May 1989)

Article 1 - Establishment of a Union

Article 2 - Definitions

Article 3 - The subject matter of the Treaty

Article 4 - The legal form of the protection

Article 5 - National treatment

Article 6 - The scope of the protection

Article 7 - Exploitation; registration, disclosure

Article 8 - The duration of the protection

Article 9 - Assembly

Article 10 - International Bureau

Article 11 - Amendment of certain provisions of the Treaty

Article 12 - Safeguard of Paris and Berne Conventions

Article 13 - Reservations

Article 14 - Settlement of disputes

Article 15 - Becoming party to the Treaty

Article 16 - Entry into force of the Treaty

Article 17 - Denunciation of the Treaty

Article 18 - Texts of the Treaty

Article 19 - Depositary

Article 20 - Signature

Metadata

SiSU Metadata, document information

Manifest

SiSU Manifest, alternative outputs etc.

Treaty on Intellectual Property in respect of Integrated Circuits (Washington, 26 May 1989)

Multilateral

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Treaty on Intellectual Property in respect of Integrated Circuits (Washington, 26 May 1989)

Article 3 - The subject matter of the Treaty

(1) [Obligation to Protect Layout-Designs (Topographies)]

(a) Each Contracting Party shall have the obligation to secure, throughout its territory, intellectual property protection in respect of layout-designs (topographies) in accordance with this Treaty. It shall, in particular, secure adequate measures to ensure the prevention of acts considered unlawful under Article 6 and appropriate legal remedies where such acts have been committed.

(b) The right of the holder of the right in respect of an integrated circuit applies whether or not the integrated circuit is incorporated in an article.

(c) Notwithstanding Article 2(i), any Contracting Party whose law limits the protection of layout-designs (topographies) to layout-designs (topographies) of semiconductor integrated circuits shall be free to apply that limitation as long as its law contains such limitation.

(2) [Requirement of Originality]

(a) The obligation referred to in paragraph (1)(a) shall apply to layout-designs (topographies) that are original in the sense that they are the result of their creators' own intellectual effort and are not commonplace among creators of layout-designs (topographies) and manufacturers of integrated circuits at the time of their creation.

(b) A layout-design (topography) that consists of a combination of elements and interconnections that are commonplace shall be protected only if the combination, taken as a whole, fulfills the conditions referred to in subparagraph (a).


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